1. Field of the Invention
The present invention relates generally to data detection and transmission techniques for use in telecommunications equipment. More specifically, the present invention relates to an improved data detector for use in Zero Byte Time Slot Interchange (ZBTSI) transmission equipment, such that the improved detector is optimized for VLSI implementation with a minimum gate count, low circuit complexity, minimum number of external control signals and a minimum processing delay. The present invention is advantageously applicable for use in Application Specific Integrated Circuit (ASIC) technologies such as gate arrays and standard cells.
2. Description of the Prior Art
The Integrated Services Digital Network (ISDN) in its implementation in the North American digital telecommunications transmission network requires a full or unconstrained clear channel capability for 64-kilobit per second (Kb/sec) communication channels. The encoding technique known as Zero-Byte Time Slot Interchange (ZBTSI) is a well known technique for providing clear channel capability, also known as bit-sequence independence over DS1 transmission carrier facilities within the North American telephone network. At present, the North American telephone network limits the number of consecutive logic "zeros" that can be transmitted because the existing bipolar line code does not transmit any pulses for a logic "zero." As a result, the transmission of long strings of logic "zeros" can cause telecommunications line haul equipment such as multiplexers and protection switches to lose timing accuracy or clock recovery altogether.
As is well known, a single PCM telecommunications channel, known as a "DSO" channel, operates at 64 kilobits per second (Kb/sec) in each direction of transmission to transmit and receive 8,000 8-bit samples per second of a desired telecommunication, whether voice or data. According to the Bell standard, individual two-way channels are multiplexed into higher speed channels for long distance transmission. As a particular example, 24 8-bit samples, one from each DSO channel, are arranged serially in a single transmission frame together with a single framing bit to form a 193-bit frame.
Transmission of successive 193-bit frames at a rate of 8,000 frames per second determines the bit rate of 1.544 Mb/sec. Set forth in the following table are some of the Bell standard digital transmission lines or hierarchical levels with their associated transmission rates and numbers of channels:
TABLE 1 ______________________________________ Transmission Line Number of Voice Channels Transmission Rate ______________________________________ DS0 1 64 Kb/sec. DS1 24 Approx. 1.5 Mb/sec. DS1C 48 Approx. 3 Mb/sec. DS2 96 Approx. 6 Mb/sec. DS3 672 Approx. 45 Mb/sec. ______________________________________
The present North American digital network cannot directly accommodate clear channel capability because of the minimum pulse density restrictions for 1.544 Mb/s DS1 signals and 3.152 Mb/s DS1C requires an average of at least one pulse in eight pulse positions and no more than 15 pulse positions without a pulse. The clock recovery circuit of these repeaters and the receive section of channel banks and other source/sink devices will lose timing accuracy, or timing altogether, in the presence of low logic "ones" density or long strings of logic "zeros." TIC-type repeaters have a similar restriction of at least a 1/8 pulse density over any 150 consecutive pulse positions.
To satisfy the clock recovery requirements of repeaters and source/sink devices, several design techniques are used to guarantee that devices originating DS1 and DS1C signals do not exceed the aforementioned pulse density constraints. In order to properly encode the highest analog frequency of a voice channel, the sampling rate has been established at 8000 samples per second. This sampling rate is also the frame rate for the DS1 signal. Each sample is encoded into an eight-bit word, which permits the dynamic range of the human voice to be mapped over 256 discrete steps in amplitude. With 8000 samples are per second times 8 bits per sample, the result is 64 Kb/s for each of the individual DSO channels. It is apparent that only the all-zero byte need be restricted, which would offer the ratio 255/256 efficiency, or 99.6 percent of the 64 kb/s channel, as unconstrained information bits for channel users. Unfortunately, existing source/sink devices are not nearly this efficient.
Analog voice signals with associated signaling are coded into the 64 Kb/s channels using a combination of robbed-bit signaling and zero code suppression to guarantee the presence of at least one logic "one" in each byte. For digital data channels, a different technique is employed to ensure that the proper "ones" density is maintained. During transmission of customer digital data, a designated control bit is forced to a logic "one" on a full-time basis. Since the sampling rate remains at 8000 samples per second and there are now only 7 bits per sample available to the channel users, the effective unconstrained information rate to the channel user reduces to 56 Kb/s.
All of the source/sink designs which do not provide for clear channel capability employ at least one of the aforementioned techniques, which reduce the available information bits in the 64 Kb/s channels.
This includes virtually all source/sink devices currently in use in the North American telecommunications network. With the advent of ISDN, some scheme of restoring user access to the full 64 Kb/s channel without restriction on the quantity and sequence of ones and zeros is required. The same requirement exists for all remaining ISDN primary-rate interfaces. The provisioning of clear channel capability requires that new source/sink devices such as PCM terminals allow unconstrained primary-rate digital signals to enter and leave the network intact, and also continue to maintain the minimum pulse density requirements toward line-haul elements. Line-haul elements include repeaters, multiplexers, and automatic protection switches. To this extent, the North American network is not operating with clear channel capability with any of the known prior art techniques currently operational. The clear channel capability function is actually synthesized condition, converting the clear channel signal to a form which can be transported by the line-haul network elements, then back to the original signal at the far-end source/sink device.
ZBTSI is a known format which allows continued use of a bipolar line code, i.e., an AMI line code, but which does not require any changes to existing telecommunications line haul equipment or to the operation, administration, maintenance and provisioning procedures associated therewith. The first ZBTSI implementation was introduced in 1983 for use in point-to-point nonswitched connections between customer premises equipment locations.
The ZBTSI algorithm is described in detail in the ANSI accredited Committee T1 document T1 LB/87-127 and was published to the Committee in September, 1987. In essence, ZBTSI encoding provides bit sequence independence (clear channel capability) in T1-type digital telecommunication transmission networks by encoding and arranging the PCM data to ensure that the minimum pulse density requirements for T1-type equipment is satisfied.
The function of a ZBTSI encoder is to scramble the incoming data, scan the scrambled data for violating zero strings, and remove those zero strings by constructing an address chain of the zero-byte locations and inserting that address chain into the zero-byte locations. A bit in the extended superframe (ESF) format frame-bit data link is set to indicate whether zero bytes were found and processed by the encoder. Specifically, the data is processed in blocks of 96 bytes or octets which are numbered sequencially from 1 to 96 in the order in which they are received. The term "octet" here is used to refer to an 8-bit data word which corresponds in bit alignment to the location of a DSO channel. If no violating all-zero octets (VAZOs) are found in the 96 octet group, Octet 96 will be transmitted first with the remaining octets transmitted in order from Octet 1 to Octet 95. Octet 96 is displaced whenever a VAZO is found in the 96 octet data group. The normal position of Octet 96 now contains the address of the first VAZO location. If multiple VAZOs are found, then the first VAZO location will contain the address of the second VAZO location, the second VAZO location will contain the address of the third location, and etc. The data from Octet 96 is now contained within the location of the last VAZO in the 96 octet group. One of the bits in the VAZO address field, serves as the Indicator of the Last VAZO Address (ILVA) and is used by the decoder to determine the end of the address chain.
An all-zero octet is considered a VAZO when it combines with the octets adjacent to it such that one of the following conditions is created:
(A) The all-zero octet is not Octet 1, 95, or 96 and it combines with its adjacent octets to form a data string with 15 or more consecutive logic zeros.
(B) The all-zero octet is not Octet 1, 95, or 96 and the data in either adjacent octet contains less than two logic ones.
(C) The all-zero octet is Octet 1 or 95.
(D) The all-zero octet is Octet 96 and (a) there is at least one other VAZO in that 96-octet group, or (b) the data in Octet 1 contains less than two logic ones.